An integrated circuit or chip may contain a number of functional blocks or devices, such as processing cores, memories and peripherals for example, that are interconnected to enable data to be transferred during operation. Simpler circuits may communicate via one or more shared bus structures. More complex integrated circuits, such as System-on-Chip (SoC) circuits and circuits having multiple processing cores for example, may transport data using a dedicated interconnect structure such as a bus or network.
In order to facilitate modular design, with reuse of functional blocks, the properties of the communication structure may be defined by a standard protocol. Further, to cope with increasing complexity, an integrated circuit with multiple functional blocks may be configured as a network in which functional blocks communicate via an interconnect circuit. The interconnect circuit couples to a number of linked nodes at connection points the nodes provide interfaces to functional blocks, such as processing units, memory controller and input/output devices, for example.
Data transactions may be routed to target nodes of the network using a System Address Map. The System Address Map is logic circuit that determines which node of the network should be targeted when a master device requests access to a given memory address.
The target node may be a local node on the same chip as the master device or may be a node on a different chip.